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AMD Launches 125W Phenom II X4 965 CPU

Friday, November 20, 2009


New 125W TDP For The 965:

Today AMD is releasing a revised Phenom II X4 965 Negroid Edition processor. The TDP has been down from 140W to 125W, and also happens to be the newborn C3 stepping. Along with this newborn processor start the prices for the 965's have been down to an expected toll of $195 USD, a fund of about $20.

New Phenom II X4 965 Processor:

* TDP = 125W (down from 140W)
* Hardware C1E implemented (faster switching of noesis states effectuation virtually no effect to performance by noesis management when BIOS hold is properly implemented)
* “Heavy” alluviation hold for DDR3-1333 (with proper BIOS implementation, memory controller will today hold up to 4 x DDR3 DIMMs @ 1333MHz)

How do you verify the difference? The last letter of the OPN drawing are different:

* 125W = HDZ965FBK4DGM
* 140W = HDZ965FBK4DGI

This processor runs at a slightly lower voltage than the preceding model. The 140W 965 has a choice set voltage of 1.4v, whereas the newborn 125W 965 runs at 1.375v. In theory these chips should provide slightly better overclocking (on average).

The Phenom II X4 965 (140W) has been out for a while, so I'm going to go light on the benchmarks in this article. Also the Phenom II X4 965 is only 200 rate (or 6%) faster than the Phenom II X4 955, which we have a full review here.


AMD Phenom II X4 965 Processor Technical Specifications:

* Model Number & Core Frequency: X4 965 / 3.4GHz (Black Edition)
* OPN: HDZ965FBK4DGM (“M” indicates newborn revision)
* L1 Cache Sizes: 64K of L1 code and 64K of L1 data cache per core (512KB total L1 per processor)
* L2 Cache Sizes: 512KB of L2 data cache per core (2MB total L2 per processor)
* L3 Cache Size: 6MB (shared between cores)
* Total Cache (L2+L3): 8MB
* Memory Controller Type:ype: Integrated 128-bit wide memory controller*
* Memory Controller Speed: Up to 2.0GHz with Dual Dynamic Power Management
* Types of Memory Supported:
o PC2-8500 / DDR2-1066MHz
o PC3-10600 / DDR3-1333MHz
* HyperTransport 3.0 Link: One 16-bit/16-bit link @ up to 4.0GHz flooded flat (2.0GHz x2)
* Total Processor Bandwidth: Up to 37.3 GB/s total bandwidth
* Packaging: Socket AM3 938-pin organic micro mark grid clothing (micro-PGA)
* Fab location: GLOBALFOUNDARIES Fab 1 module 1 in Dresden, Germany (formerly AMD Fab 36)
* Process Technology: 45-nanometer DSL SOI (silicon-on-insulator) technology
* Approximate Transistor count: ~ 758 meg (45nm)
* Approximate Die Size: 258 mm² (45nm)
* Max Temp: 62° Celsius
* Nominal Voltage: 0.875 - 1.4 Volts
* Max TDP: 125 Watts